Dual simulated annealing soft decoder for linear block codes
Abstract
This paper proposes a new approach to soft decoding for linear block codes called dual simulated annealing soft decoder (DSASD) which utilizes the dual code instead of the original code, using the simulated annealing algorithm as presented in a previously developed work. The DSASD algorithm demonstrates superior decoding performance across a wide range of codes, outperforming classical simulated annealing and several other tested decoders. We conduct a comprehensive evaluation of the proposed algorithm's performance, optimizing its parameters to achieve the best possible results. Additionally, we compare its decoding performance and algorithmic complexity with other decoding algorithms in its category. Our results demonstrate a gain in performance of approximately 2.5 dB at a bit error rate (BER) of 6×10⁻⁶ for the LDPC (60,30) code.
Keywords
BCH codes; Decoding algorithms; Dual codes; Error correction codes; Linear block codes; Simulated annealing; Soft decoding
Full Text:
PDFDOI: http://doi.org/10.11591/ijai.v14.i4.pp2776-2787
Refbacks
- There are currently no refbacks.
Copyright (c) 2025 Institute of Advanced Engineering and Science
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
IAES International Journal of Artificial Intelligence (IJ-AI)
ISSN/e-ISSN 2089-4872/2252-8938
This journal is published by the Institute of Advanced Engineering and Science (IAES).